The present invention relates to thermal processing of semiconductor wafers. More specifically, the present invention relates to a method and apparatus for rapid thermal processing (RTP) of semiconductor wafers.
Semiconductor chip fabrication on silicon wafers requires many precisely controlled sequential steps to deposit, implant, diffuse, remove, or form key materials. During fabrication, thermal process steps include, for example, dielectric deposition, post-implant annealing, diffusion barrier formation, contact alloying, oxidation, oxide nitridation, and epitaxial silicon growth. During these process steps, the wafer temperature is elevated to enhance activation of the desired mechanisms. In the near future, further reduction of critical dimensions of integrated circuits from 0.35 microns to 0.18 microns and the implementation of shallower junctions will require tighter thermal processing temperature tolerances, from the present 10.degree.-15.degree. C. to 1.degree.-2.degree. C. Further, wafers are expected to increase in size from 200 mm to 300 mm.
To meet these requirements, thermal processing will increasingly shift from batch processing to single wafer Rapid Thermal Processing (RTP). In batch processing, many wafers are simultaneously processed and utilize relatively slow temperature transients and long cycle times. However, the temperatures experienced by each wafer depend on its location in the stack. Single wafer processing can potentially impose nearly identical wafer-to-wafer conditions, enhancing wafer-to-wafer reproducibility and allowing tighter temperature tolerances. However, to generate product throughputs comparable to batch furnaces, the RTP process must incorporate rapid heatups (50.degree. to 100.degree. C./s) and cool-downs, and higher process temperatures for shorter times, which increase difficulties of meeting temperature level and uniformity requirements.
In current commercial RTP systems, wafer heating is generally accomplished using electrically-powered lamp elements which radiate high intensity thermal energy from an extended distance onto the surface of the wafer. It would be desirable to utilize a more controllable heating technique, as lamp heating has several major disadvantages. First, it is difficult to irradiate the wafer uniformly and thereby attain a uniform wafer temperature. Second, the temperature of the wafer is generally measured pyrometrically, usually positioned outside the reactor. Pyrometric temperature measurement is difficult, though, because stray reflected and transmitted lamp radiation corrupts the pyrometer input, and because the effective emissivity of the wafer is often not accurately known and can change during the process. Other known RTP heating and measurement techniques, which fall into categories of optical heating/sensing, have similar disadvantages.
In contrast to RTP, chemical vapor deposition (CVD) and etch process steps in semiconductor fabrication are known to use a heated wafer chuck at constant temperature. The chuck is simply a flat surface of suitable material upon which the wafer rests, usually in the horizontal orientation. The chuck is generally heated from its backside (the wafer rests on the front side) by a number of means, such as electrical resistance heater element, RF induction, or lamp radiation. When necessary, the thermal design of the chuck incorporates temperature leveling to promote wafer temperature uniformity. The temperature of the chuck may be measured by a thermocouple, which is straightforwardly used as a process control variable. However, such heated chucks have not been implemented in RTP systems since these standard chucks generally have a thermal mass that is too large to permit ramp rates required for RTP applications.
There are three primary design considerations in implementing the reactor concept according to the present invention. First, through heating efficiency, there are minimal pattern effects by utilization of backside heating and the frontal shield. Second, there is high space-time resolution control, thereby permitting high control authority. Finally, high gas flow/mixing permits a high processing rate and increases throughput. This creates a high efficiency reactor that allows for quick switching between processing steps. Also, the showerhead edges may be curved to provide uniform downward gas flow. Further, the showerhead edges may be used as electrodes during plasma cleaning.